The present invention relates to a semiconductor integrated circuit device suited to incorporation in a single semiconductor chip and a method for measuring circuit characteristics of the semiconductor integrated circuit device, and particularly relates to a semiconductor integrated circuit device and characteristic measuring method capable of performing high-precision measurements in a relatively straightforward manner.
One semiconductor integrated circuit of the related art is a semiconductor integrated circuit device referred to as a so-called system LSI. With this system LSI, a flash memory, for example, is incorporated as program memory together with a microprocessor (MPU) on a single semiconductor chip. These types of semiconductor integrated circuit devices are referred to as built-in flash Micro Controller Units (MCU) or one-chip microcontrollers.
With these one-chip microcontrollers, programs for microprocessors are stored in memory. A data latch circuit constituted by flip-flops constructed from, for example, a latch or a combination of latches is then provided between a data output port of the memory and a data input port of the microprocessor to ensure that appropriate program data requested by a microprocessor receiving a system clock is reliably read into the microprocessor.
When the above microprocessor requests data from the above memory, a data read control signal is supplied to the memory from the microprocessor. The address of the requested data is then outputted from the microprocessor, and the address outputted from the microprocessor is inputted to the memory after a prescribed address delay time (t AD), determined primarily by resistance of wiring provided between the microprocessor and the memory for the address and the capacitance of this wiring, has elapsed.
The memory then outputs data corresponding to this address to the data output port after a prescribed access time (t AA) from receiving the address at the address input port has elapsed.
The output data from the memory is inputted to the latch circuit after a prescribed data delay time (t DD) determined by the wiring resistance and wiring capacitance as described above.
When a latch control signal for latching data is received from the microprocessor, the latch circuit holds the inputted data and the data held at the latch circuit is read in to the microprocessor. However, a data latch delay time (t SD) that delays the clock timing by a prescribed amount of time is applied in order to take into consideration the wiring resistance and wiring capacitance due to the signal line for the latch control signal in order to ensure that the appropriate data corresponding to the address is reliably read into the microprocessor.
By setting this data latch delay time (t SD), as is well known in the related art, it is possible to reliably guarantee a set up time (t DS) constituting a minimum time for which the input data is valid for input to the latch circuit prior to input of the latch control signal and a hold time constituting a minimum time that the input data for input to the latch circuit is valid after input of the latch control circuit. As a result, appropriate data corresponding to the address can be reliably read into the microprocessor.
It is therefore necessary to have appropriate values for characteristic values such as, for example, set up time or memory access time in order to be aware of the performance of the system LSI.
Measurement means are connected to the address input port and the data output port of the memory of the semiconductor chip when measuring access time of the memory incorporated into the system LSI. The memory access time can then be measured using the measurement means.
However, in measurement methods where measurement means are inserted from outside of the system LSI, delay times between the measurement means and the input and output ports of the memory constituting the subject of measurement have a substantial influence on the measurement results. Further, generally speaking, the delay time between the measuring means and the subject of measurement is substantially larger than the delay time occurring during actual operation within the system LSI, meaning that measurements are therefore carried out under an environment differing from the actual operating conditions.
Therefore, in order to measure values accurately with the system LSI operating under normal conditions, it is necessary for the delay time between the measuring means and the subject being measured to accurately coincide with a delay time corresponding to that of the actual LSI, and for this reason accurate measuring of circuit characteristics has not been straightforward.
The present invention may provide a novel measurement method and a novel semiconductor integrated circuit device implementing this method capable of measuring in such a manner that, when measuring the characteristics of system LSI""s, the influence of external measuring means that causes changes in normal operating conditions is no longer incurred.
The semiconductor integrated circuit characteristic measuring method of the present invention for measuring the characteristics of a semiconductor integrated circuit comprising a microprocessor operating in accordance with a clock, a memory having an address input port for receiving an address from the microprocessor and a data output port for outputting data corresponding to the address, and a latch circuit provided between the memory and the microprocessor and operating with a prescribed set up time according to a latch control signal from the microprocessor in order to provide data corresponding to the address from the memory to the microprocessor therefore comprises the steps of: increasing a prescribed delay time occurring during normal operation applied to the address supplied from the microprocessor to the memory, obtaining a critical delay time where the data corresponding to the address can no longer be read in by the microprocessor in an appropriate manner, and obtaining a set up time for the semiconductor circuit from this critical delay time.